4-2 Rudimentary Logic Functions 4-3 Decoding 4-4 Encoding

6-1 Sequential Circuit Definitions 6-2 Latches 6-3 Flip-Flops 6-6 Other Flip-Flop Types 6-4 (Sync.) Sequential Circuit Analysis 6-5 (Sync.) Sequential Circuit Design

3-1 Design Concepts and Automation 3-2 The Design Space 3-3 Design Procedure 3-4 Technology Mapping

6-9 Chapter Summary 7-1 Registers and Load Enable 7-2 Register Transfers 7-3 Register Transfer Operations 7-4 A Note for VHDL and? Verilog Users Only 7-5 Microoperations 7-6 Microoperatrions on a Single Register 7-7 Register Cell Design 7-8 Multiplexer and Bus-Based Transfer for Multiple Registers 7-9 Serial Transfer and Microoperations 7-10HDL Representation for Shift Registes and Counters— VHDL 7-11HDL Representation for Shift Registes and Counters— Verilog 7-12 Chapter Summar

5-2 Binary Adders 5-3 Binary Subtraction 5-4 Binary Adder-Subtractors

2-7 Other Gate Types 2-8 Exclusive-OR Operator and Gates 2-9 High-Impedance Outputs 2-10Chapter Summary

5-5 Binary Multiplication 5-6 Other Arithmetic Functions 5-9 Chapter Summary

3-1 Design Concepts and Automation 3-2 The Design Space 3-3 Design Procedure 3-4 Technology Mapping 3-5 Verification 3-6 Programmable Implementation Technologies 3-7 Chapter Summary

2-1 Binary Logic and Gates 2-2 Boolean Algebra 2-3 Standard Forms

4-5 Selecting 4-6 Combinational Function Implementation 4-9 Chapter Summary 5-1 Iterative Combinational Circuits

3-4 Technology Mapping 3-5 Verification 3-6 Programmable Implementation Technologies 3-7 Chapter Summary 4-1 Combinational Circuits

2-4 Two-Level Circuit Optimization 2-5 Map Manipulation 2-6 Multiple-Level Circuit Optimization

1-1 Digital Systems 1-2 Number Systems 1-3 Arithmetic Operations 1-4 Decimal Codes 1-5 Gray Codes 1-6 Alphanumeric Codes 1-7 Chapter Summary